library ieee;  use ieee.std_logic_1164.all;

use work.dlx_types.all;

entity memory is

  generic ( mem_size : positive;
            Tac_first : delay_length;
            Tac_burst : delay_length;
            Tpd_clk_out : delay_length;
            load_file_name : string := "memory.dlx" );

  port ( clk : in bit;
         a : in dlx_address;
         d : inout dlx_bus_word;
         width : in dlx_mem_width;
         write_enable : in bit;
         burst : in bit := '0';
         mem_enable : in bit;
         ready : out bit );

end entity memory;