fg_20_05.vhd	entity flipflop
		architecture behavior of flipflop
		entity fg_20_05
		architecture test of fg_20_05

fg_20_06.vhd	package mem_pkg
		package body mem_pkg

fg_20_09.vhd	entity bottom
		architecture bottom_arch of bottom

fg_20_07.vhd	entity top
		architecture top_arch of top

fg_20_11.vhd	entity fg_20_11
		architecture test of fg_20_11

fg_20_12.vhd	package physical_attributes
		entity \74x138\

fg_20_13.vhd	entity fg_20_13
		architecture test of fg_20_13

tb_20_02.vhd	package graphics_pkg

fg_20_14.vhd	package gate_components

fg_20_15.vhd	package cell_attributes
		entity CPU
		architecture cell_based of CPU

fg_20_16.vhd	entity fg_20_16
		architecture test of fg_20_16

fg_20_17.vhd	package voltage_defs

fg_20_18.vhd	package timing_attributes
		entity sequencer
		architecture structural of sequencer

fg_20_19.vhd	package display_interface

fg_20_20.vhd	package constraints
		entity clock_buffer

tb_20_01.vhd	package utility_definitions

ch_20_01.vhd	entity ch_20_01
		architecture test of ch_20_01

ch_20_02.vhd	entity ch_20_02
		architecture test of ch_20_02

ch_20_03.vhd	package ch_20_03_a
		entity ch_20_03
		architecture std_cell of ch_20_03

ch_20_04.vhd	package ch_20_04
		entity flipflop
		architecture std_cell of flipflop
		package model_utilities

ch_20_05.vhd	entity ch_20_05
		architecture test of ch_20_05

ch_20_06.vhd	entity ch_20_06
		architecture test of ch_20_06

ch_20_07.vhd	entity ch_20_07
		architecture test of ch_20_07

ch_20_08.vhd	entity ch_20_08
		architecture std_cell of ch_20_08

ch_20_09.vhd	package ch_20_09_a
		entity e
		architecture arch of e
		entity ch_20_09
		architecture test of ch_20_09

ch_20_10.vhd	package ch_20_10
		entity and2
		architecture accelerated of and2

ch_20_11.vhd	entity ch_20_11
		architecture test of ch_20_11