------------------------------------------------------------------------------- -- Copyright (c) 2003 Mentor Graphics Corporation -- -- This model is a component of the Mentor Graphics VHDL-AMS educational open -- source model library, and is covered by this license agreement. This model, -- including any updates, modifications, revisions, copies, and documentation -- are copyrighted works of Mentor Graphics. USE OF THIS MODEL INDICATES YOUR -- COMPLETE AND UNCONDITIONAL ACCEPTANCE OF THE TERMS AND CONDITIONS SET FORTH -- IN THIS LICENSE AGREEMENT. Mentor Graphics grants you a non-exclusive -- license to use, reproduce, modify and distribute this model, provided that: -- (a) no fee or other consideration is charged for any distribution except -- compilations distributed in accordance with Section (d) of this license -- agreement; (b) the comment text embedded in this model is included verbatim -- in each copy of this model made or distributed by you, whether or not such -- version is modified; (c) any modified version must include a conspicuous -- notice that this model has been modified and the date of modification; and -- (d) any compilations sold by you that include this model must include a -- conspicuous notice that this model is available from Mentor Graphics in its -- original form at no charge. -- -- THIS MODEL IS LICENSED TO YOU "AS IS" AND WITH NO WARRANTIES, EXPRESS OR -- IMPLIED. MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES OF -- MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. MENTOR GRAPHICS SHALL -- HAVE NO RESPONSIBILITY FOR ANY DAMAGES WHATSOEVER. ------------------------------------------------------------------------------- -- File : sw_1p3t.vhd -- Author : Mentor Graphics -- Created : 2003-04-18 -- Last update: 2003-05-13 ------------------------------------------------------------------------------- -- Description: Single-pole triple-throw electrical switch ------------------------------------------------------------------------------- -- Revisions : -- Date Version Author Description -- 2003-04-18 1.0 Mentor Graphics Created ------------------------------------------------------------------------------- -- Notes: -- 1. Integer value on ctrl port determines switch position. -- 2. Use sw_ctrl.vhd model in SystemVision model library ------------------------------------------------------------------------------- library IEEE; use IEEE.std_logic_1164.all; -- Use IEEE natures and packages use IEEE.electrical_systems.all; entity sw_1p3t is generic (r_open : resistance := 1.0e6; -- Open (off) resistances r_closed : resistance := 1.0e-3; -- Closed (on) resistances td_make : real := 1.0e-9; -- time to "make" contacts td_break : real := 1.1e-9); -- time to "break" contacts port (signal ctrl : in integer; terminal com, p1, p2, p3 : electrical); end entity sw_1p3t; architecture ideal of sw_1p3t is signal r_sig1 : resistance := r_closed; -- sets default to position 1 signal r_sig2 : resistance := r_open; signal r_sig3 : resistance := r_open; quantity v1 across i1 through com to p1; -- branch quantities quantity v2 across i2 through com to p2; quantity v3 across i3 through com to p3; quantity r1 : resistance; -- free quantities quantity r2 : resistance; quantity r3 : resistance; begin -- purpose: Detect Switch position and assign resistance value to r_sig -- type : combinational -- inputs : ctrl -- outputs: r_sig DetectPosition : process (ctrl) begin -- position 1 (default) connects com to p1 if (ctrl = 1) then r_sig1 <= r_closed; -- signal assignments r_sig2 <= r_open; r_sig3 <= r_open; -- position 2 connects com to p2 elsif (ctrl = 2) then r_sig1 <= r_open; r_sig2 <= r_closed; r_sig3 <= r_open; -- position 2 connects com to p3 elsif (ctrl = 3) then r_sig1 <= r_open; r_sig2 <= r_open; r_sig3 <= r_closed; else -- undefined positions set all resistances to r_open r_sig1 <= r_open; r_sig2 <= r_open; r_sig3 <= r_open; end if; end process DetectPosition; r1 == r_sig1'RAMP(td_break, td_make); -- use 'ramp attribute for linear r2 == r_sig2'RAMP(td_break, td_make); -- transition between values r3 == r_sig3'RAMP(td_break, td_make); v1 == r1*i1; v2 == r2*i2; v3 == r3*i3; end architecture ideal; ------------------------------------------------------------------------------- -- Copyright (c) 2003 Mentor Graphics Corporation -------------------------------------------------------------------------------