-------------------------------------------------------------------------------
-- Copyright (c) 2003 Mentor Graphics Corporation
--
-- This model is a component of the Mentor Graphics VHDL-AMS educational open 
-- source model library, and is covered by this license agreement. This model,
-- including any updates, modifications, revisions, copies, and documentation 
-- are copyrighted works of Mentor Graphics. USE OF THIS MODEL INDICATES YOUR 
-- COMPLETE AND UNCONDITIONAL ACCEPTANCE OF THE TERMS AND CONDITIONS SET FORTH
-- IN THIS LICENSE AGREEMENT.  Mentor Graphics grants you a non-exclusive 
-- license to use, reproduce, modify and distribute this model, provided that:
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-- compilations distributed in accordance with Section (d) of this license 
-- agreement; (b) the comment text embedded in this model is included verbatim
-- in each copy of this model made or distributed by you, whether or not such 
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-- notice that this model has been modified and the date of modification; and 
-- (d) any compilations sold by you that include this model must include a 
-- conspicuous notice that this model is available from Mentor Graphics in its
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--
-- THIS MODEL IS LICENSED TO YOU "AS IS" AND WITH NO WARRANTIES, EXPRESS OR 
-- IMPLIED.  MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES OF 
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-- HAVE NO RESPONSIBILITY FOR ANY DAMAGES WHATSOEVER.
-------------------------------------------------------------------------------
-- File       : clamp_iv.vhd
-- Author     : Mentor Graphics
-- Created    : 2003-05-30
-- Last update: 
-------------------------------------------------------------------------------
-- Description: Simple PWL i vs. v model, for use as a power or ground clamp.
-- User can enter an arbitrary set of current vs. voltage data points. Note the
-- voltage "vdata" points must be monotonically increasing. Also note that the
-- polarity of vdata is from terminal pos to neg. When this model is used as a 
-- clamp, typically the positive current for a positive voltage will be small,
-- but the negative current for a negative voltage will have large magnitude.
-- Normally, with a positive voltage, the clamp (diode) is reverse biased and OFF.
-------------------------------------------------------------------------------
-- Revisions  :
-- Date        Version     Author              Description
-- 2003-05-30  1.0         Mentor Graphics     Created
-------------------------------------------------------------------------------

Library IEEE;
use IEEE.electrical_systems.all;
Library MGC_AMS; 
use mgc_ams.pwl_functions.all;
 
entity clamp_iv is
generic (
	idata : real_vector;            -- i vs. v clamp data
	vdata : real_vector
	);
port (	
	terminal pos, neg :  electrical
	);
end entity clamp_iv;

architecture behavioral of clamp_iv is
    QUANTITY v across i through pos TO neg;
    constant mono_data : boolean := monotonically_increasing(vdata);
begin

assert mono_data
	report "vdata must be monotonically increasing"
	severity error;

	i == pwl_dim1_extrap(v, vdata, idata);
 
end architecture behavioral;

-------------------------------------------------------------------------------
-- Copyright (c) 2003 Mentor Graphics Corporation
-------------------------------------------------------------------------------