-------------------------------------------------------------------------------
-- Copyright (c) 2003 Mentor Graphics Corporation
--
-- This model is a component of the Mentor Graphics VHDL-AMS educational open 
-- source model library, and is covered by this license agreement. This model,
-- including any updates, modifications, revisions, copies, and documentation 
-- are copyrighted works of Mentor Graphics. USE OF THIS MODEL INDICATES YOUR 
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-- IN THIS LICENSE AGREEMENT.  Mentor Graphics grants you a non-exclusive 
-- license to use, reproduce, modify and distribute this model, provided that:
-- (a) no fee or other consideration is charged for any distribution except 
-- compilations distributed in accordance with Section (d) of this license 
-- agreement; (b) the comment text embedded in this model is included verbatim
-- in each copy of this model made or distributed by you, whether or not such 
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-- notice that this model has been modified and the date of modification; and 
-- (d) any compilations sold by you that include this model must include a 
-- conspicuous notice that this model is available from Mentor Graphics in its
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--
-- THIS MODEL IS LICENSED TO YOU "AS IS" AND WITH NO WARRANTIES, EXPRESS OR 
-- IMPLIED.  MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES OF 
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-- File       : cm_limiting_amplifier.vhd
-- Author     : Mentor Graphics
-- Created    : 2003-05-30
-- Last update: 
-------------------------------------------------------------------------------
-- Description: Current Mode Limiting Amplifier behavioral model. This model provide a
--              current mode output that is proportional to the analog input voltage at
--              v_input, up to the current limiting level i_max. The current gain is i_gain
--              Amps/Volt. This model is used in combination with two external pull-up resistors 
--              connected to Vcc, where terminals out_p and out_n are attached to the low-side of 
--              these resistors. This model steers current from out_p and out_n to an internal 
--              ground. For v_input > 0.0, more current flows through out_n (to the internal ground)
--              than through out_p, pulling the voltage at out_n down more than the voltage at
--              out_p. This provides an effective positive differential output voltage. 
-------------------------------------------------------------------------------
-- Revisions  :
-- Date        Version     Author              Description
-- 2003-05-30  1.0         Mentor Graphics     Created
-------------------------------------------------------------------------------

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.electrical_systems.all;

entity cm_limiting_amplifier is
  generic (i_max    : current      := 20.0e-3;	   -- Maximum current output
           i_gain   : real         := 100.0e-3);   -- Current gain, Amps./Volt

  port (terminal v_input, out_p, out_n :    electrical);

end entity cm_limiting_amplifier;


architecture behavioral of cm_limiting_amplifier is

  quantity v_in across v_input to electrical_ref;
  quantity v_p across i_p through out_p to electrical_ref;
  quantity v_n across i_n through out_n to electrical_ref;

begin

if v_in'above(0.0) use
  if v_in'above(i_max/i_gain) use
    i_n == i_max;
    i_p == 0.0;
  else
    i_n == 0.5*(i_max + v_in*i_gain);
	i_p == 0.5*(i_max - v_in*i_gain);
  end use;
else
  if not v_in'above(-1.0*i_max/i_gain) use
    i_n == 0.0;
	i_p == i_max;
  else
    i_n == 0.5*(i_max + v_in*i_gain);
	i_p == 0.5*(i_max - v_in*i_gain);
  end use;
end use;

break on v_in'above(i_max/i_gain);
break on v_in'above(-i_max/i_gain);

end architecture behavioral;

-------------------------------------------------------------------------------
-- Copyright (c) 2003 Mentor Graphics Corporation
-------------------------------------------------------------------------------