------------------------------------------------------------------------------- -- Copyright (c) 2003 Mentor Graphics Corporation -- -- This model is a component of the Mentor Graphics VHDL-AMS educational open -- source model library, and is covered by this license agreement. This model, -- including any updates, modifications, revisions, copies, and documentation -- are copyrighted works of Mentor Graphics. USE OF THIS MODEL INDICATES YOUR -- COMPLETE AND UNCONDITIONAL ACCEPTANCE OF THE TERMS AND CONDITIONS SET FORTH -- IN THIS LICENSE AGREEMENT. Mentor Graphics grants you a non-exclusive -- license to use, reproduce, modify and distribute this model, provided that: -- (a) no fee or other consideration is charged for any distribution except -- compilations distributed in accordance with Section (d) of this license -- agreement; (b) the comment text embedded in this model is included verbatim -- in each copy of this model made or distributed by you, whether or not such -- version is modified; (c) any modified version must include a conspicuous -- notice that this model has been modified and the date of modification; and -- (d) any compilations sold by you that include this model must include a -- conspicuous notice that this model is available from Mentor Graphics in its -- original form at no charge. -- -- THIS MODEL IS LICENSED TO YOU "AS IS" AND WITH NO WARRANTIES, EXPRESS OR -- IMPLIED. MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES OF -- MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. MENTOR GRAPHICS SHALL -- HAVE NO RESPONSIBILITY FOR ANY DAMAGES WHATSOEVER. ------------------------------------------------------------------------------- -- File : dci.vhd -- Author : Mentor Graphics -- Created : 2003-05-30 -- Last update: ------------------------------------------------------------------------------- -- Description: Digitally Controlled Impedance (DCI) model. Can be used in any -- I/O buffer model as an externally settable series or parallel termination. -- Adjusts the internal impedance between pins "pos" and "neg", to match an external -- reference resistor connected between pin "ref" and an external ground. -- The internal impedance value is quantized to 2**nbits levels. The model includes -- an internal 10k Ohm "by-pass" resistor from the ref port to an internal ground. It -- provide a current path in case the ref pin is left open in the external circuit. ------------------------------------------------------------------------------- -- Revisions : -- Date Version Author Description -- 2003-05-30 1.0 Mentor Graphics Created ------------------------------------------------------------------------------- LIBRARY IEEE; use IEEE.std_logic_1164.all; use IEEE.math_real.all; use IEEE.electrical_systems.all; entity dci is generic ( ical : current := 5.0e-3; -- Calibration current supplied to the external resistor at ref (A) rmax : real := 100.0; -- Maximum output impedance (Ohm) nbits : integer := 5 -- Number of bits to quantize the digitally controlled impedance ); port ( terminal pos, neg, ref : electrical ); end entity dci; architecture behavioral of dci is quantity vref across iref through ref TO electrical_ref; quantity v across i through pos TO neg; signal r_dci : real := rmax/2.0; -- Quantized (DCI) resistance constant max_count : real := REAL(2**nbits - 1); -- Maximum count for nbits (converted to Real) begin set_dci : process -- This process only runs at initialization variable rmeas : real; variable count : real; begin wait until domain = time_domain; -- Wait until DC solution is found rmeas := vref/ical; -- Measure external ref. resistor value if (rmeas > rmax) then count := REAL(max_count); else count := TRUNC((rmeas/rmax)*max_count); -- Set proportional digital count (Truncate) end if; r_dci <= (count/max_count)*rmax; -- Set dci impedance to quantized value wait; -- Wait forever end process set_dci; iref == -1.0*ical + vref/10.0e3; -- Cal. current to external resistor (+ parallel 10k "by-pass") v == i*r_dci; -- Ohm's Law end architecture behavioral; ------------------------------------------------------------------------------- -- Copyright (c) 2003 Mentor Graphics Corporation -------------------------------------------------------------------------------