-------------------------------------------------------------------------------
-- Copyright (c) 2003 Mentor Graphics Corporation
--
-- This model is a component of the Mentor Graphics VHDL-AMS educational open 
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-- THIS MODEL IS LICENSED TO YOU "AS IS" AND WITH NO WARRANTIES, EXPRESS OR 
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-------------------------------------------------------------------------------
-- File       : decoupling_cap.vhd
-- Author     : Mentor Graphics
-- Created    : 2003-05-30
-- Last update: 
-------------------------------------------------------------------------------
-- Description: Models multiple (n) indentical decoupling capacitors. Assumes there
-- is identical voltage across all of the decoupling capacitors (i.e. No significant 
-- propagation delay  between spacially dispersed capacitors). Can be used to model 
-- the fundamental mode resonance of a set of decoupling capacitors decoupling a PCB
-- power and gound plane.
-- Circuit topology:
--
--   "p1" ---------------------------------------------------
--         |	             |   
--         R esr		     R esr
--         | 			     |
--         L esl		     L esl
--         | ------	         |-------	  .....  "n" parallel identical elements
--       -----	   |	   -----     |
--       ----- c   R epr   ----- c   R epr
--         |       |		 |	     |
--         |-------          |-------
--   "p2" -------------------------------------------------- 
--
-------------------------------------------------------------------------------
-- Revisions  :
-- Date        Version     Author              Description
-- 2003-05-30  1.0         Mentor Graphics     Created
-------------------------------------------------------------------------------

library IEEE;
use IEEE.electrical_systems.all;

entity decoupling_cap is
  generic (
    n	: integer := 1;		-- Number of decoupling capacitors 
    c	: real := 0.01e-6;	-- Capacitance value of each individual capacitor
    esl : real := 0.0;		-- Equivalent series inductance of each individual capacitor
	esr : real := 0.0;		-- Equivalent series resistance of each individual capacitor
	epr : real := 1.0e6		-- Equivalent parallel (leakage) resistance of each individual capacitor
	);             
  port (
    terminal p1, p2 : electrical);
end entity decoupling_cap;
 
architecture behavioral of decoupling_cap is
  constant rn : real := real(n);   -- Convert n to a real number rn
  quantity v across ni through p1 to p2;  -- Voltage across and current through all n decoupling capacitors
  quantity i : current;			-- Current through each individual decoupling capacitor
  quantity vc : voltage;		-- Voltage across each ideal capacitor (internal voltage, does not include esr,esl drop)
  quantity ic, iepr : current;	-- Current through each ideal capacitor and epr, respectively
begin
		ni == rn*i;
		i == ic + iepr;
		iepr == vc/epr;
		ic == c*vc'dot;
		v == vc + esr*i + esl*i'dot;
end architecture behavioral;

-------------------------------------------------------------------------------
-- Copyright (c) 2003 Mentor Graphics Corporation
-------------------------------------------------------------------------------