-- C:\Mentor_Projects\CS2_Mixed_Technology\hdl\limiter_2_e.vhd
library IEEE; use IEEE.electrical_systems.all;
entity limiter_2_e is
	generic (
		limit_high : real := 4.8;	-- upper limit
		limit_low : real := -4.8); 	-- lower limit
	port (
		terminal input: electrical;
		terminal output: electrical);					
end entity limiter_2_e;

architecture simple of limiter_2_e is
  	QUANTITY vin ACROSS input TO ELECTRICAL_REF;
  	QUANTITY vout ACROSS iout THROUGH output TO ELECTRICAL_REF;
	constant slope : real := 1.0e-4;
begin
	if vin > limit_high use	-- Upper limit exceeded, so limit input signal
		vout == limit_high + slope*(vin - limit_high);
	elsif vin < limit_low use	-- Lower limit exceeded, so limit input signal
		vout == limit_low + slope*(vin - limit_low);
	else		-- No limit exceeded, so pass input signal as is
		vout == vin;
	end use;
	break on vin'above(limit_high), vin'above(limit_low);
end architecture simple;
--

-- C:\Mentor_Projects\CS2_Mixed_Technology\hdl\gain_e.vhd
library IEEE;
use IEEE.MATH_REAL.all;
-- Use proposed IEEE natures and packages
library IEEE;
use IEEE.ELECTRICAL_SYSTEMS.all;

entity gain_e is
	generic (
		k: REAL := 1.0);  -- Gain multiplier
	port 	(	terminal input : electrical;
			terminal output: electrical);
end entity gain_e;

architecture simple of gain_e is

  QUANTITY vin ACROSS input TO ELECTRICAL_REF;
  QUANTITY vout ACROSS iout THROUGH output TO ELECTRICAL_REF;

begin
	vout == k*vin;
end architecture simple;
--

-- C:\Mentor_Projects\CS2_Mixed_Technology\hdl\rudder_horn_e.vhd
-------------------------------------------------------------------------------
-- Rudder Model
--
--  Transfer Function:
--                            
--  theta_out =   arcsin(pos_t_in/R) 
--
-- Where pos_t_in = input translational position,
-- R = horn radius, 
-- theta_out = output rotational angle
-------------------------------------------------------------------------------

-- Use IEEE_proposed instead of disciplines
library IEEE;
use ieee.math_real.all;
library IEEE;
use IEEE.electrical_systems.all;


entity rudder_horn_e is
  
  generic (
    R   : real := 1.0);            -- Rudder horn radius

  port (
    terminal pos_t_in    : electrical;   -- input port
    terminal theta_out   : electrical);  -- output port
     
end entity rudder_horn_e;

architecture bhv of rudder_horn_e is
  quantity vin across pos_t_in to electrical_ref;
  quantity vout across iout through theta_out to electrical_ref;

  begin  -- bhv
   vout == arcsin(vin/R);
end bhv;
--

-- C:\Mentor_Projects\CS2_Mixed_Technology\hdl\ctl_horn_e.vhd
-------------------------------------------------------------------------------
-- Control Horn for Rudder Control
--
--  Transfer Function:
--                            
--  pos_t_out =   R*sin(theta) 
--
-- Where pos_t = output translational position,
-- R = horn radius, 
-- theta_in = input rotational angle
-------------------------------------------------------------------------------

-- Use IEEE_proposed instead of disciplines
library IEEE;
use IEEE.electrical_systems.all;
library IEEE;
use ieee.math_real.all;

entity ctl_horn_e is
  
  generic (
    R   : real := 1.0);            -- horn radius

  port (
    terminal theta_in    : electrical;   -- input port
    terminal pos_t_out   : electrical);  -- output port
     
end entity ctl_horn_e;

architecture bhv of ctl_horn_e is
  quantity vin across theta_in to electrical_ref;
  quantity vout across iout through pos_t_out to electrical_ref;

  begin  -- bhv
   vout == R*sin(vin);
end bhv;
--

-- C:\Mentor_Projects\CS2_Mixed_Technology\hdl\lead_lag_e.vhd
-------------------------------------------------------------------------------
-- Lead-Lag Filter
--
--  Transfer Function:
--
--                  (s + w1)         
--    H(s) =  k *  ----------
--                  (s + w2)
--
-- DC Gain = k*w1/w2
-------------------------------------------------------------------------------

-- Use IEEE_proposed instead of disciplines
library IEEE;
use IEEE.electrical_systems.all;
library IEEE;
use ieee.math_real.all;

entity lead_lag_e is
	generic (
		k: real := 1.0;  			-- Gain multiplier
		f1: real := 10.0;			-- First break frequency (zero)
		f2: real := 100.0);		-- Second break frequency (pole)
	port 	(	terminal input: electrical;
			terminal output: electrical);
end entity lead_lag_e;

architecture simple of lead_lag_e is
  QUANTITY vin ACROSS input TO ELECTRICAL_REF;
  QUANTITY vout ACROSS iout THROUGH output TO ELECTRICAL_REF;

	quantity vin_temp : real;
	constant w1 : real := f1*math_2_pi;
	constant w2 : real := f2*math_2_pi;
	constant num : real_vector := (w1, 1.0);                                                    
	constant den : real_vector := (w2, 1.0);
begin
	vin_temp == vin;
	vout == k*vin_temp'ltf(num, den);
end architecture simple;

--

-- C:\Mentor_Projects\CS2_Mixed_Technology\hdl\sum2_e.vhd
library IEEE;
library IEEE;
use IEEE.electrical_systems.all;
use IEEE.mechanical_systems.all;
use IEEE.fluidic_systems.all;
use IEEE.thermal_systems.all;
use IEEE.radiant_systems.all;

entity sum2_e is
	generic (k1, k2: real := 1.0);  -- Gain multipliers
	port 	(	terminal in1, in2: electrical;
			terminal output: electrical);
end entity sum2_e;

architecture simple of sum2_e is
  QUANTITY vin1 ACROSS in1 TO ELECTRICAL_REF;
  QUANTITY vin2 ACROSS in2 TO ELECTRICAL_REF;
  QUANTITY vout ACROSS iout THROUGH output TO ELECTRICAL_REF;

begin
	vout == k1*vin1 + k2*vin2;
end architecture simple;
--

-- c:\epd\SystemVision.1\sim\2003.2\systemvision\win32\edulib\v3.0_2.1\Electrical/v_sine.vhd
-------------------------------------------------------------------------------
-- Copyright (c) 2001 Mentor Graphics Corporation
--
-- This model is a component of the Mentor Graphics VHDL-AMS educational open 
-- source model library, and is covered by this license agreement. This model,
-- including any updates, modifications, revisions, copies, and documentation 
-- are copyrighted works of Mentor Graphics. USE OF THIS MODEL INDICATES YOUR 
-- COMPLETE AND UNCONDITIONAL ACCEPTANCE OF THE TERMS AND CONDITIONS SET FORTH
-- IN THIS LICENSE AGREEMENT.  Mentor Graphics grants you a non-exclusive 
-- license to use, reproduce, modify and distribute this model, provided that:
-- (a) no fee or other consideration is charged for any distribution except 
-- compilations distributed in accordance with Section (d) of this license 
-- agreement; (b) the comment text embedded in this model is included verbatim
-- in each copy of this model made or distributed by you, whether or not such 
-- version is modified; (c) any modified version must include a conspicuous 
-- notice that this model has been modified and the date of modification; and 
-- (d) any compilations sold by you that include this model must include a 
-- conspicuous notice that this model is available from Mentor Graphics in its
-- original form at no charge.
--
-- THIS MODEL IS LICENSED TO YOU "AS IS" AND WITH NO WARRANTIES, EXPRESS OR 
-- IMPLIED.  MENTOR GRAPHICS SPECIFICALLY DISCLAIMS ALL IMPLIED WARRANTIES OF 
-- MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.  MENTOR GRAPHICS SHALL
-- HAVE NO RESPONSIBILITY FOR ANY DAMAGES WHATSOEVER.
-------------------------------------------------------------------------------
-- File       : v_sine.vhd
-- Author     : Mentor Graphics
-- Created    : 2001/06/16
-- Last update: 2003-05-13
-------------------------------------------------------------------------------
-- Description: Electrical sinusoidal voltage source
--              Includes frequency domain settings
-------------------------------------------------------------------------------
-- Revisions  :
-- Date        Version     Author              Description
-- 2001/06/16  1.0         Mentor Graphics     Created
-- 2001/07/03  1.1         Mentor Graphics     Changed generics from real to
--                                             voltage.
-------------------------------------------------------------------------------

library IEEE;
use IEEE.MATH_REAL.all;
-- Use IEEE natures and packages
use IEEE.ELECTRICAL_SYSTEMS.all;

entity v_sine is

  generic (
    freq      : real;                   -- frequency [Hertz]
    amplitude : voltage;                -- amplitude [Volts]
    phase     : real    := 0.0;         -- initial phase [Degrees]
    offset    : voltage := 0.0;         -- DC value [Volts]
    df        : real    := 0.0;         -- damping factor [1/second]
    ac_mag    : voltage := 1.0;         -- AC magnitude [Volts]
    ac_phase  : real    := 0.0);        -- AC phase [Degrees]

  port (
    terminal pos, neg : electrical);

end entity v_sine;

-------------------------------------------------------------------------------
-- Ideal Architecture
-------------------------------------------------------------------------------
architecture ideal of v_sine is
-- Declare Branch Quantities
  quantity v across i through pos to neg;
-- Declare Quantity for Phase in radians (calculated below)
  quantity phase_rad : real;
-- Declare Quantity in frequency domain for AC analysis
  quantity ac_spec   : real spectrum ac_mag, math_2_pi*ac_phase/360.0;

begin
-- Convert phase to radians
  phase_rad == math_2_pi *(freq * NOW + phase / 360.0);

  if domain = quiescent_domain or domain = time_domain use
    v == offset + amplitude * sin(phase_rad) * EXP(-NOW * df);
  else
    v == ac_spec;           -- used for Frequency (AC) analysis
  end use;

end architecture ideal;

-------------------------------------------------------------------------------
-- Copyright (c) 2001 Mentor Graphics Corporation
-------------------------------------------------------------------------------
--

-- C:\Mentor_Projects\CS2_Mixed_Technology\hdl\lpf_1_e.vhd
-------------------------------------------------------------------------------
-- Second Order Lowpass filter
--
--  Transfer Function:
--
--                    w1*w2         
--   H(s) =  k * ----------------
--               (s + w1)(s + w2)
--
-- DC Gain = k
-------------------------------------------------------------------------------

-- Use IEEE_proposed instead of disciplines
library IEEE;
use IEEE.electrical_systems.all;
library IEEE;
use ieee.math_real.all;

entity lpf_1_e is
  generic (
    fp   : real;            -- pole freq
    gain : real := 1.0);    -- filter gain

    port 	(	terminal input: electrical;
			terminal output: electrical);
end entity lpf_1_e;

architecture simple of lpf_1_e is
  QUANTITY vin ACROSS input TO ELECTRICAL_REF;
  QUANTITY vout ACROSS iout THROUGH output TO ELECTRICAL_REF;

  constant wp : real := math_2_pi*fp;    
  constant num : real_vector := (0 => wp*gain);  -- 0=> is needed to give
                                                   -- index when only a single
                                                   -- element is used.
  constant den : real_vector := (wp, 1.0);
  quantity vin_temp : real;  

begin
	vin_temp == vin;   -- intermediate variable (vin) req'd for now
	vout == vin_temp'ltf(num, den);
end architecture simple;

--

-- C:\Mentor_Projects\CS2_Mixed_Technology\hdl\integ_1_e.vhd
-------------------------------------------------------------------------------
-- Integrator
--
--  Transfer Function:
--
--               k         
--  H(s) =   ---------
--               s 
--
-------------------------------------------------------------------------------

-- Use IEEE_proposed instead of disciplines
library IEEE;
use IEEE.electrical_systems.all;
library IEEE;
use ieee.math_real.all;

entity integ_1_e is
	generic (
		k: real := 1.0;		-- Gain
--		init: real := real'low);  -- Initial value of output
		init: real := 0.0);  -- Initial value of output
	port 	(terminal input: electrical;
		terminal output: electrical);
end entity integ_1_e;

architecture simple of integ_1_e is
  QUANTITY vin ACROSS input TO ELECTRICAL_REF;
  QUANTITY vout ACROSS iout THROUGH output TO ELECTRICAL_REF;

  quantity vin_temp : real;
begin
  vin_temp == vin;
--  IF domain = QUIESCENT_DOMAIN AND init /= real'low USE
  IF domain = QUIESCENT_DOMAIN AND init /= 0.0 USE
  	vout == init;
  ELSE 
	vout == k*vin_temp'INTEG;

  END USE;

end architecture simple;
--

-- C:\Mentor_Projects\CS2_Mixed_Technology\genhdl\rudder_control_block\rudder_control_block.vhd
-- genhdl\rudder_control_block/rudder_control_block.vhd
-- Generated by SystemVision netlister 1.0 build 2003.325.1
-- File created Sun Nov 23 09:28:38 2003

library ieee;
use ieee.std_logic_1164.all;
use ieee.electrical_systems.all;
use ieee.mechanical_systems.all;
use ieee.fluidic_systems.all;
use ieee.thermal_systems.all;
use ieee.radiant_systems.all;
library edulib;
use work.all;

entity RUDDER_CONTROL_BLOCK is
end entity RUDDER_CONTROL_BLOCK;

architecture arch_RUDDER_CONTROL_BLOCK of RUDDER_CONTROL_BLOCK is
   terminal XSIG010044: ELECTRICAL;
   terminal MTR_OUT: ELECTRICAL;
   terminal XSIG010046: ELECTRICAL;
   terminal GEAR_OUT: ELECTRICAL;
   terminal ERROR: ELECTRICAL;
   terminal POS_FB: ELECTRICAL;
   terminal CTL_HORN_OUT: ELECTRICAL;
   terminal MTR_IN: ELECTRICAL;
   terminal ERR_LIMIT_IN: ELECTRICAL;
   terminal INTEG_OUT: ELECTRICAL;
   terminal RUDDER_OUT: ELECTRICAL;
   terminal RUDDER_IN: ELECTRICAL;
   terminal MTR_GEN_TRQ: ELECTRICAL;
   terminal XSIG010050: ELECTRICAL;
   terminal COMP_IN: ELECTRICAL;
   terminal SRC_IN: ELECTRICAL;
   terminal LOAD_TRQ: ELECTRICAL;
   terminal XSIG010043: ELECTRICAL;
   terminal MTR_FB: ELECTRICAL;

   component SUM2_E
      generic( K1 : REAL:=1.0;
               K2 : REAL:=1.0 );
      port( terminal IN1 :  ELECTRICAL;
            terminal IN2 :  ELECTRICAL;
            terminal OUTPUT :  ELECTRICAL );
   end component SUM2_E;

   component LEAD_LAG_E
      generic( F1 : REAL:=10.0;
               F2 : REAL:=100.0;
               K : REAL:=1.0 );
      port( terminal INPUT :  ELECTRICAL;
            terminal OUTPUT :  ELECTRICAL );
   end component LEAD_LAG_E;

   component RUDDER_HORN_E
      generic( R : REAL:=1.0 );
      port( terminal POS_T_IN :  ELECTRICAL;
            terminal THETA_OUT :  ELECTRICAL );
   end component RUDDER_HORN_E;

   component LIMITER_2_E
      generic( LIMIT_HIGH : REAL:=4.8;
               LIMIT_LOW : REAL:=-4.8 );
      port( terminal INPUT :  ELECTRICAL;
            terminal OUTPUT :  ELECTRICAL );
   end component LIMITER_2_E;

   component LPF_1_E
      generic( FP : REAL;
               GAIN : REAL:=1.0 );
      port( terminal INPUT :  ELECTRICAL;
            terminal OUTPUT :  ELECTRICAL );
   end component LPF_1_E;

   component CTL_HORN_E
      generic( R : REAL:=1.0 );
      port( terminal THETA_IN :  ELECTRICAL;
            terminal POS_T_OUT :  ELECTRICAL );
   end component CTL_HORN_E;

   component INTEG_1_E
      generic( INIT : REAL:=0.0;
               K : REAL:=1.0 );
      port( terminal INPUT :  ELECTRICAL;
            terminal OUTPUT :  ELECTRICAL );
   end component INTEG_1_E;

   component V_SINE
      generic( AC_MAG : VOLTAGE:=0.0;
               AC_PHASE : REAL:=0.0;
               AMPLITUDE : VOLTAGE;
               DF : REAL:=0.0;
               FREQ : REAL;
               OFFSET : VOLTAGE:=0.0;
               PHASE : REAL:=0.0 );
      port( terminal POS :  ELECTRICAL;
            terminal NEG :  ELECTRICAL );
   end component V_SINE;

   component GAIN_E
      generic( K : REAL:=1.0 );
      port( terminal INPUT :  ELECTRICAL;
            terminal OUTPUT :  ELECTRICAL );
   end component GAIN_E;

   for ERR_LIMIT: LIMITER_2_E use entity WORK.LIMITER_2_E;
   for MTR_KE: GAIN_E use entity WORK.GAIN_E;
   for GEAR_BOX: GAIN_E use entity WORK.GAIN_E;
   for MTR_KT: GAIN_E use entity WORK.GAIN_E;
   for RUDDER_HORN: RUDDER_HORN_E use entity WORK.RUDDER_HORN_E;
   for GEAR_BOX_HORN: CTL_HORN_E use entity WORK.CTL_HORN_E;
   for MECH_LIMIT: LIMITER_2_E use entity WORK.LIMITER_2_E;
   for POS_FB_GAIN: GAIN_E use entity WORK.GAIN_E;
   for LOOP_COMP: LEAD_LAG_E use entity WORK.LEAD_LAG_E;
   for SUM_POS: SUM2_E use entity WORK.SUM2_E;
   for V_SOURCE: V_SINE use entity EDULIB.V_SINE;
   for LOOP_GAIN: GAIN_E use entity WORK.GAIN_E;
   for MTR_MECH_POLE: LPF_1_E use entity WORK.LPF_1_E;
   for MTR_ELEC_POLE: LPF_1_E use entity WORK.LPF_1_E;
   for TRQ_FB_GAIN: GAIN_E use entity WORK.GAIN_E;
   for RUDDER_TRQ: GAIN_E use entity WORK.GAIN_E;
   for INTEGRATOR: INTEG_1_E use entity WORK.INTEG_1_E;
   for SUM_LOAD_TRQ: SUM2_E use entity WORK.SUM2_E;
   for SUM_MTR_IN: SUM2_E use entity WORK.SUM2_E;

begin

   ERR_LIMIT : LIMITER_2_E
      port map ( INPUT => ERR_LIMIT_IN,
                OUTPUT => MTR_IN );

   MTR_KE : GAIN_E
      generic map ( K => -3.43E-3 )
      port map ( INPUT => MTR_OUT,
                OUTPUT => MTR_FB );

   GEAR_BOX : GAIN_E
      generic map ( K => 0.01 )
      port map ( INPUT => MTR_OUT,
                OUTPUT => GEAR_OUT );

   MTR_KT : GAIN_E
      generic map ( K => 3.43E-3 )
      port map ( INPUT => XSIG010044,
                OUTPUT => MTR_GEN_TRQ );

   RUDDER_HORN : RUDDER_HORN_E
      port map ( POS_T_IN => CTL_HORN_OUT,
                THETA_OUT => RUDDER_OUT );

   GEAR_BOX_HORN : CTL_HORN_E
      port map ( THETA_IN => RUDDER_IN,
                POS_T_OUT => CTL_HORN_OUT );

   MECH_LIMIT : LIMITER_2_E
      port map ( INPUT => INTEG_OUT,
                OUTPUT => RUDDER_IN );

   POS_FB_GAIN : GAIN_E
      generic map ( K => -4.57 )
      port map ( INPUT => RUDDER_IN,
                OUTPUT => POS_FB );

   LOOP_COMP : LEAD_LAG_E
      generic map ( F1 => 5.0,
                    F2 => 20000.0,
                    K => 4000.0 )
      port map ( INPUT => COMP_IN,
                OUTPUT => ERR_LIMIT_IN );

   SUM_POS : SUM2_E
      port map ( IN1 => SRC_IN,
                IN2 => POS_FB,
                OUTPUT => ERROR );

   V_SOURCE : V_SINE
      generic map ( AMPLITUDE => 4.7,
                    FREQ => 1.0 )
      port map ( POS => SRC_IN,
                NEG => ELECTRICAL_REF );

   LOOP_GAIN : GAIN_E
      generic map ( K => 100.0 )
      port map ( INPUT => ERROR,
                OUTPUT => COMP_IN );

   MTR_MECH_POLE : LPF_1_E
      generic map ( FP => 5.33,
                    GAIN => 177.67E3 )
      port map ( INPUT => XSIG010046,
                OUTPUT => MTR_OUT );

   MTR_ELEC_POLE : LPF_1_E
      generic map ( FP => 172.48,
                    GAIN => 0.4545 )
      port map ( INPUT => XSIG010043,
                OUTPUT => XSIG010044 );

   TRQ_FB_GAIN : GAIN_E
      generic map ( K => 0.01 )
      port map ( INPUT => RUDDER_IN,
                OUTPUT => XSIG010050 );

   RUDDER_TRQ : GAIN_E
      generic map ( K => -0.2 )
      port map ( INPUT => XSIG010050,
                OUTPUT => LOAD_TRQ );

   INTEGRATOR : INTEG_1_E
      generic map ( K => 1.0 )
      port map ( INPUT => GEAR_OUT,
                OUTPUT => INTEG_OUT );

   SUM_LOAD_TRQ : SUM2_E
      port map ( IN1 => MTR_GEN_TRQ,
                IN2 => LOAD_TRQ,
                OUTPUT => XSIG010046 );

   SUM_MTR_IN : SUM2_E
      port map ( IN1 => MTR_IN,
                IN2 => MTR_FB,
                OUTPUT => XSIG010043 );

end architecture arch_RUDDER_CONTROL_BLOCK;

--