-- genhdl\tb_calcbuckparams/tb_calcbuckparams.vhd -- Generated by SystemVision netlister 1.0 build 2003.308.1 -- File created Thu Nov 06 07:52:56 2003 LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.electrical_systems.all; USE ieee.mechanical_systems.all; USE ieee.fluidic_systems.all; USE ieee.thermal_systems.all; USE ieee.radiant_systems.all; LIBRARY edulib; USE work.all; entity TB_CALCBUCKPARAMS is end entity TB_CALCBUCKPARAMS; architecture arch_TB_CALCBUCKPARAMS of TB_CALCBUCKPARAMS is quantity FREQ_IN: REAL; quantity LMIN: INDUCTANCE; quantity CMIN: CAPACITANCE; component CALCBUCKPARAMS generic( IMIN : CURRENT:=15.0E-3; RESR : RESISTANCE:=50.0E-3; VD : VOLTAGE:=0.7; VIN : VOLTAGE:=42.0; VOUT : VOLTAGE:=4.8; VRIPPLE : VOLTAGE:=100.0E-3 ); port( quantity FSW : IN REAL; quantity LMIN : OUT INDUCTANCE; quantity CMIN : OUT CAPACITANCE ); end component CALCBUCKPARAMS; component QSRC_PULSE generic( AC_MAG : REAL:=1.0; AC_PHASE : REAL:=0.0; DELAY : TIME:=0 MS; INITIAL : REAL:=0.0; PERIOD : TIME; PULSE : REAL; TI2P : TIME:=1 NS; TP2I : TIME:=1 NS; WIDTH : TIME ); port( quantity OUTPUT : OUT REAL ); end component QSRC_PULSE; for CALCBUCKPARAMS1: CALCBUCKPARAMS use entity WORK.CALCBUCKPARAMS; for SRC1: QSRC_PULSE use entity EDULIB.QSRC_PULSE; begin CALCBUCKPARAMS1 : CALCBUCKPARAMS generic map ( IMIN => 15.0E-3, RESR => 50.0E-3, VD => 0.7, VIN => 42.0, VOUT => 4.8, VRIPPLE => 100.0E-3 ) port map ( FSW => FREQ_IN, LMIN => LMIN, CMIN => CMIN ); SRC1 : QSRC_PULSE generic map ( DELAY => 1MS, INITIAL => 25.0E3, PERIOD => 1000MS, PULSE => 200.0E3, TI2P => 1MS, TP2I => 1MS, WIDTH => 100MS ) port map ( OUTPUT => FREQ_IN ); end architecture arch_TB_CALCBUCKPARAMS;