-- genhdl\tb_compensator/tb_compensator.vhd
-- Generated by SystemVision netlister 1.0 build 2003.310.1
-- File created Mon Nov 10 14:45:37 2003

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.electrical_systems.all;
USE ieee.mechanical_systems.all;
USE ieee.fluidic_systems.all;
USE ieee.thermal_systems.all;
USE ieee.radiant_systems.all;
LIBRARY edulib;
USE work.all;

entity TB_COMPENSATOR is
end entity TB_COMPENSATOR;

architecture arch_TB_COMPENSATOR of TB_COMPENSATOR is
   terminal VIN: ELECTRICAL;
   terminal VOUT: ELECTRICAL;

   component V_CONSTANT
      generic( AC_MAG : VOLTAGE:=0.0;
               AC_PHASE : REAL:=0.0;
               LEVEL : VOLTAGE );
      port( terminal POS :  ELECTRICAL;
            terminal NEG :  ELECTRICAL );
   end component V_CONSTANT;

   component COMP_2P2Z
      generic( FP1 : REAL:=7.5E3;
               FP2 : REAL:=531.0E3;
               FZ1 : REAL:=806.0;
               FZ2 : REAL:=806.0;
               GAIN : REAL:=100.0 );
      port( terminal INPUT :  ELECTRICAL;
            terminal OUTPUT :  ELECTRICAL;
            terminal REF :  ELECTRICAL );
   end component COMP_2P2Z;

   for COMP_2P2Z3: COMP_2P2Z use entity WORK.COMP_2P2Z;
   for VINPUT: V_CONSTANT use entity EDULIB.V_CONSTANT(IDEAL);

begin

   COMP_2P2Z3 : COMP_2P2Z
      generic map ( FZ1 => 403.0,
                    FZ2 => 403.0,
                    GAIN => 500.0 )
      port map ( INPUT => VIN,
                OUTPUT => VOUT,
                REF => ELECTRICAL_REF );

   VINPUT : V_CONSTANT
      generic map ( AC_MAG => 1.0,
                    LEVEL => 0.0 )
      port map ( POS => VIN,
                NEG => ELECTRICAL_REF );

end architecture arch_TB_COMPENSATOR;