The Designer's Guide to VHDL, 3rd Edition
Peter J. Ashenden
Source Code
Chapter 1 - Fundamental Concepts
Chapter 2 - Scalar Data Types and Operations
Chapter 3 - Sequential Statements
Chapter 4 - Composite Data
Chapter 5 - Basic Modeling Constructs
Chapter 6 - Subprograms
Chapter 7 - Packages and Use Clauses
Chapter 8 - Resolved Signals
Chapter 9 - Predefined and Standard Packages
Chapter 10 - Case Study: A Pipelined Multiplier Accumulator
Chapter 11 - Aliases
Chapter 12 - Generics
Chapter 13 - Components and Configurations
Chapter 14 - Generate Statements
Chapter 15 - Access Types
Chapter 16 - Files and Input/Output
Chapter 17 - Case Study: A Package for Memories
Chapter 18 - Test Bench and Verification Features
Chapter 19 - Shared Variables and Protected Types
Chapter 20 - Attributes and Groups
Chapter 21 - Design for Synthesis
Chapter 22 - Case Study: System Design Using the Gumnut Core
Chapter 23 - Miscellaneous Topics